Interactive chip reference

7501 DIP-40 pinout

7501 40-pin DIP-40 pinout. 6510-family HMOS CPU with built-in 7-bit I/O port and GATE IN, 40-pin DIP

Package
DIP-40
Pin count
40
Category
CPU

Pin reference

Pin Name Function Group
1 PHI0 Phase 0 clock input clock
2 RDY Ready / DMA halt control control
3 /IRQ Maskable interrupt request control
4 AEC Address enable control; tri-states the address bus when low control
5 VDD Positive supply input power
6 A0 Address bus bit 0 output
7 A1 Address bus bit 1 output
8 A2 Address bus bit 2 output
9 A3 Address bus bit 3 output
10 A4 Address bus bit 4 output
11 A5 Address bus bit 5 output
12 A6 Address bus bit 6 output
13 A7 Address bus bit 7 output
14 A8 Address bus bit 8 output
15 A9 Address bus bit 9 output
16 A10 Address bus bit 10 output
17 A11 Address bus bit 11 output
18 A12 Address bus bit 12 output
19 A13 Address bus bit 13 output
20 VSS Ground reference ground
21 A14 Address bus bit 14 output
22 A15 Address bus bit 15 output
23 GATE IN Gate input for the built-in tape / serial control port control
24 P6 Built-in I/O port bit 6 bidir
25 P5 Built-in I/O port bit 5 bidir
26 P4 Built-in I/O port bit 4 bidir
27 P3 Built-in I/O port bit 3 bidir
28 P2 Built-in I/O port bit 2 bidir
29 P1 Built-in I/O port bit 1 bidir
30 P0 Built-in I/O port bit 0 bidir
31 D7 Data bus bit 7 bidir
32 D6 Data bus bit 6 bidir
33 D5 Data bus bit 5 bidir
34 D4 Data bus bit 4 bidir
35 D3 Data bus bit 3 bidir
36 D2 Data bus bit 2 bidir
37 D1 Data bus bit 1 bidir
38 D0 Data bus bit 0 bidir
39 R/W Read / write bus direction control
40 /RES Reset input control

View the interactive 7501 package diagram and labeled pin details on WhichPin.