Interactive chip reference

6510 DIP-40 pinout

6510 40-pin DIP-40 pinout. 6502-derived microprocessor with built-in 6-bit I/O port, 40-pin DIP

Package
DIP-40
Pin count
40
Category
CPU

Pin reference

Pin Name Function Group
1 PHI1 Phase 1 clock input clock
2 RDY Ready / DMA halt control control
3 /IRQ Maskable interrupt request control
4 /NMI Non-maskable interrupt request control
5 AEC Address enable control; tri-states the address bus when low control
6 VCC Positive supply input power
7 A0 Address bus bit 0 output
8 A1 Address bus bit 1 output
9 A2 Address bus bit 2 output
10 A3 Address bus bit 3 output
11 A4 Address bus bit 4 output
12 A5 Address bus bit 5 output
13 A6 Address bus bit 6 output
14 A7 Address bus bit 7 output
15 A8 Address bus bit 8 output
16 A9 Address bus bit 9 output
17 A10 Address bus bit 10 output
18 A11 Address bus bit 11 output
19 A12 Address bus bit 12 output
20 A13 Address bus bit 13 output
21 VSS Ground reference ground
22 A14 Address bus bit 14 output
23 A15 Address bus bit 15 output
24 P5 Built-in I/O port bit 5 bidir
25 P4 Built-in I/O port bit 4 bidir
26 P3 Built-in I/O port bit 3 bidir
27 P2 Built-in I/O port bit 2 bidir
28 P1 Built-in I/O port bit 1 bidir
29 P0 Built-in I/O port bit 0 bidir
30 D7 Data bus bit 7 bidir
31 D6 Data bus bit 6 bidir
32 D5 Data bus bit 5 bidir
33 D4 Data bus bit 4 bidir
34 D3 Data bus bit 3 bidir
35 D2 Data bus bit 2 bidir
36 D1 Data bus bit 1 bidir
37 D0 Data bus bit 0 bidir
38 R/W Read / write bus direction control
39 PHI2O Phase 2 clock output clock
40 /RES Reset input control

View the interactive 6510 package diagram and labeled pin details on WhichPin.